International Conference on Field Programmable Logic and Applications (FPL)LEONG, Philip H. W; KOCH, Andreas; BOEMO, Eduardo et al.IET computers & digital techniques (Print). 2007, Vol 1, Num 4, pp 267-321, issn 1751-8601, 54 p.Conference Paper

FPGA 2006 (Fourteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays)ACM International Symposium on Field-Programmable Gate Arrays. 2006, isbn 1-595-93292-5, 1Vol, VIII-240 p, isbn 1-595-93292-5Conference Proceedings

FPGA'09 (proceedings of the Seventeenth ACM SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, California, USA, February 22-24, 2009)ACM International Symposium on Field-Programmable Gate Arrays. 2009, isbn 978-1-60558-410-2, 1Vol, XII-289 p, isbn 978-1-60558-410-2Conference Proceedings

12th annual IEEE symposium on field-programmable custom computing machines (Napa CA, 20-23 April 2004)Annual IEEE symposium on field-programmable custom computing machines. 2004, isbn 0-7695-2230-0, 1Vol, X-346 p, isbn 0-7695-2230-0Conference Proceedings

Accelerating DTP with reconfigurable computing enginesMACVICAR, D; SINGH, S.Lecture notes in computer science. 1998, pp 391-395, issn 0302-9743, isbn 3-540-64948-4Conference Paper

Implantation et optimisation des primitives cryptographiques = Implementation and Optimization of Cryptographic PrimitivesPornin, Thomas; Stern, Jacques.2001, 137 p.Thesis

A transmutable telecom systemMIYAZAKI, T; SHIRAKAWA, K; KATAYAMA, M et al.Lecture notes in computer science. 1998, pp 366-375, issn 0302-9743, isbn 3-540-64948-4Conference Paper

FPGA Programming for the MassesBACON, David F; RABBAH, Rodric; SHUKLA, Sunil et al.Communications of the ACM. 2013, Vol 56, Num 4, pp 56-63, issn 0001-0782, 8 p.Article

Reconfigurable computing (architectures and applications)Bertels, Koen; Cardoso, João M. P; Vassiliadis, Stamatis et al.Lecture notes in computer science. 2006, issn 0302-9743, isbn 3-540-36708-X, 1Vol, XVI-469 p, isbn 3-540-36708-XConference Proceedings

Power management for FPGAs : Power-driven design partitioningMUKHERIEE, Rajarshi; OARENCI MEMIK, Seda.Annual IEEE symposium on field-programmable custom computing machines. 2004, pp 326-327, isbn 0-7695-2230-0, 1Vol, 2 p.Conference Paper

Reconfigurable hardware as shared resource in multipurpose computersHAUG, G; ROSENSTIEL, W.Lecture notes in computer science. 1998, pp 149-158, issn 0302-9743, isbn 3-540-64948-4Conference Paper

2002 IEEE international conference on field-programmable technology ( FPT) (Hong Kong, 16-18 December 2002)IEEE international conference on field-programmable technology. 2002, isbn 0-7803-7574-2, XV, 456 p, isbn 0-7803-7574-2Conference Proceedings

The architecture of dual-mode FPGA Embedded System blocksLIN, Ernie; WILTON, Steven J. E.Custom integrated circuits conference. 2002, pp 67-70, isbn 0-7803-7250-6, 4 p.Conference Paper

The use of low cost FPGAs for tone detection circuitsCOBLEY, R. A.Communication systems & digital signal processing. International symposium. 1998, pp 109-112, 2VolConference Paper

Implementing processor arrays on FPGAsVASSANYI, I.Lecture notes in computer science. 1998, pp 446-450, issn 0302-9743, isbn 3-540-64948-4Conference Paper

Encrypted IP video communication systemAPETRECHIOAIE, Bogdan; MATEESCU, Luminita.Proceedings of SPIE, the International Society for Optical Engineering. 2010, Vol 7821, issn 0277-786X, isbn 978-0-8194-8330-0, 782116.1-782116.11Conference Paper

A novel FPGA configuration bitstream generation algorithm and tool developmentSIOZIOS, K; KOUTROUMPEZIS, G; TATAS, K et al.Lecture notes in computer science. 2004, pp 1116-1118, issn 0302-9743, isbn 3-540-22989-2, 3 p.Conference Paper

Hardware-in-the-loop evolution of a 3-bit multiplierLARCHEV, Gregory V; LOHN, Jason D.Annual IEEE symposium on field-programmable custom computing machines. 2004, pp 277-278, isbn 0-7695-2230-0, 1Vol, 2 p.Conference Paper

FPGA acceleration of rigid molecule interactionsVAN COURT, Tom; YONGFENG GU; HERBORDT, Martin C et al.Annual IEEE symposium on field-programmable custom computing machines. 2004, pp 300-301, isbn 0-7695-2230-0, 1Vol, 2 p.Conference Paper

Reconfigurable technology : FPGAs and reconfigurable processors for computing and communications III (Denver CO, 21-22 August 2001)Schewel, John; Athanas, Peter M; James-Roxby, Philip B et al.SPIE proceedings series. 2001, isbn 0-8194-4249-6, V, 174 p, isbn 0-8194-4249-6Conference Proceedings

A new floorplanning method for FPGA architectural researchWOLZ, F; KOLLA, R.Lecture notes in computer science. 2000, pp 432-442, issn 0302-9743, isbn 3-540-67899-9Conference Paper

Modular inversion based on digit-level speculative additionCILARDO, A.Electronics letters. 2013, Vol 49, Num 25, pp 1609-1610, issn 0013-5194, 2 p.Article

A virtual file system for dynamically reconfigurable FPGAsDONLIN, Adam; LYSAGHT, Patrick; BLODGET, Brandon et al.Lecture notes in computer science. 2004, pp 1127-1129, issn 0302-9743, isbn 3-540-22989-2, 3 p.Conference Paper

Diagnosis of open defects in FPGA interconnectMEHDI BARADARAN TAHOORI.IEEE international conference on field-programmable technology. 2002, pp 328-331, isbn 0-7803-7574-2, 4 p.Conference Paper

Increasing microprocessor performance with tightly-coupled reconfigurable logic arraysSAWITZKI, S; GRATZ, A; SPALLEK, R. G et al.Lecture notes in computer science. 1998, pp 411-415, issn 0302-9743, isbn 3-540-64948-4Conference Paper